The embodiment relates to a method of designing a pattern capable of avoiding a moiré phenomenon between optical substrates applied to various display equipment.
In general, a moiré pattern is a natural interference phenomenon occurring when two independent periodical patterns are superimposed onto each other at a predetermined angle.
The moiré pattern inevitably appears on all color CRT TVs due to waves, ripples or an intensity variation such as small wisps superimposed onto an image displayed on the screen.
Phosphorescence is generated on a CRT when an electron beam is incident upon a shadow mask doped with phosphor. If the phosphorescence area in the shadow mask is equal to the incident area of the electron beams, the phosphorescence pattern by the electron beam is superimposed upon a regular pattern of the shadow mask. A moiré pattern is formed on the CRT due to existence of the two regular patterns. Therefore, if moiré patterns are not formed on the CRT, it means that the electron beam emitted from the electron gun of the CRT is not exactly incident upon the center of the phosphor. In this case, an image on the CRT is fuzzy.
This is because the size of a pixel is smaller than the size of a phosphor material although the size of the pixel generated by a video board is equal to the incident area of the electron beam. Therefore, the above problem may be solved by allowing the size of the phosphor material to be equal to the size of the pixel generated by the video board.
Meanwhile, in an LCD (Liquid Crystal Display), each liquid crystal cell itself operates as a single pixel. Thus, the moiré patterns may not appear in the LCD.
However, in case of a 3D image display that implements full parallax using two lenticular plates, a flat panel display, that is, an LCD is used as an image display panel and a micro-lens array plate or two lenticular plates are superimposed thereon. Thus, when a pitch between micro-lenses or a pitch between regions in which the lenses constituting each lenticular plate make contact with each other is not exactly aligned with a pixel pitch of the LCD, a moiré pattern is generated.
Particularly, the micro-lens array plate or lenticular plate has a thickness. Thus, a viewing distance or viewing angle may be changed due to the thickness. In this case, the moiré pattern may be generated even if a pitch between micro-lenses or a pitch between regions in which the lenses constituting each lenticular plate make contact with each other is exactly aligned with a pixel pitch of the LCD.
FIG. 1 is a schematic diagram illustrating a mechanism of avoiding a moiré phenomenon caused due to the superimposition and overlap of two optical substrates having a specific pattern used in a device, a touch panel or a display to which an optical sheet is applied.
That is, a lower optical substrate B having a general lattice pattern and an upper optical substrate A having another lattice pattern are inevitably stacked in an overlap structure in equipment, so that the moiré phenomenon occurs. According to the related art, in order to avoid the moiré phenomenon, the substrates are rotated at specific tilt angles θ1 and θ2, respectively and disposed in the equipment at the positions which the moiré phenomenon is minimized.
As shown in FIG. 2, since the moiré phenomenon occurs in the stack structure of an optical substrate C having a lattice pattern and disposed on a display D, the optical substrate C is also rotated at a specific avoidance angle θ3 to avoid the moiré phenomenon when manufacturing the equipment.
However, since this scheme requires searching for a moiré avoidance section at a specific angle between the lattice patterns and the section is very narrow, it is very difficult to apply the above scheme in practice. In a case of a display such as an LED, since the upper lattice patterns are individually designed according to a cell type (pixel pitch), it is impossible to universally utilize the scheme, and in addition, it is difficult to completely remove the moiré pattern.
As a related art, there is Korean unexamined patent publication No. 10-2005-0013020